Abstract:

To address the challenges of high-power DC charging piles in terms of charging power, a two-channel parallel three-phase pulse width modulation (PWM) rectifier using All-SiC devices is taken as the research object. Its operating principle and mathematical model are analyzed, and the generation mechanisms of common-mode voltage as well as low-frequency and high-frequency circulating currents are investigated. On this basis, a control architecture based on the “common DC voltage outer loop + independent current inner loop” is proposed, which integrates phase-separated carrier phase-opposition disposition and zero-sequence component injection techniques. A composite constraint strategy with the capability to suppress low-frequency and high-frequency circulating currents as well as common-mode voltage is thus formed. Furthermore, simulations are carried out to verify the rationality of the control strategy. Finally, a 60 kW two-channel parallel three-phase PWM rectifier prototype using All-SiC devices is built. Experiments verify the feasibility of the proposed scheme. This work provides a reference for the design and optimization of three-phase PWM rectifiers in high-power applications.

Key words: high-power charging pile, three-phase PWM rectifier, circulating current suppression, common-mode voltage suppression, space vector pulse width modulation (SVPWM)